In U.S. Pat. No. 6,888,196, a conventional structure of power semiconductor device is disclosed, as shown in FIG. 1, wherein an N-channel trench MOSFET comprising a plurality of trenched gates 110 surrounded by n+ source regions 112 encompassed in P body regions 114 is formed in an N epitaxial layer 102 over an N+ substrate 100. To connect the source regions 112 and the body regions 114 to a source metal 122, a trenched source-body contact structure 118 with vertical sidewalls is employed penetrating through a contact interlayer 120, the n+ source regions 112 and extending into the P body regions 114. Furthermore, a p+ body ohmic contact doped region 116 is implanted surrounding bottom of the trenched source-body contact structure 118 to decrease a contact resistance between the P body regions 114 and the trenched source-body contact structure 118.
The conventional structure in FIG. 1 is accoutering a technical difficulty which is that avalanche always occurs near bottom of the trenched gates 110, causing a hazardous condition to the power semiconductor device. As we all know that, in the trench MOSFET shown in FIG. 1, an avalanche current Iav (illustrated in FIG. 1) flows between the trenched gates 110 and the trenched source-body contact structure 118, triggering turning-on of a parasitic bipolar transistor (illustrated in FIG. 1) when Iav*Rb>0.7V, wherein Rb is a resistance between the p+ body ohmic contact doped region 116 and channel regions near the trenched gates 110. As is known to all that, the doping concentration of the p+ body ohmic contact doped region 116 is higher than that of the P body regions 114 (please refer to FIG. 2 for Y1-Y1′ cross section of FIG. 1), which is helpful to decrease resistance Rb, however, as the sidewalls of the trenched source-body contact structure 118 is perpendicular to front surface of the N epitaxial layer 102, after carrying out implantation through a contact opening and filling with a W (tungsten) plug for formation of the trenched source-body contact structure 118, the p+ body ohmic contact doped region 116 can be formed only surrounding bottom of the trenched source-body contact structure 118, resulting in a high resistance Rb underneath the n+ source regions 112. Therefore, the parasitic bipolar transistor is easily to be triggered turning on due to the high resistance Rb, thus weakening the avalanche capability of the trench MOSFET.
FIG. 3 shows another trench MOSFET in prior art disclosed in U.S. Patent Publication No. 20080890357. Comparing to FIG. 1, the trench MOSFET in FIG. 3 comprises a plurality of trenched gates 130 having terrace gate structure for gate resistance reduction, wherein top surface of gate conductive layer filled in gate trenches is higher than the sidewalls of the gate trenches. However, the limitation of poor avalanche capability discussed above is still pronounced in this structure due to the easily turning-on of a parasitic bipolar transistor and the occurring of avalanche near bottom of the trenched gates 130.
For other power semiconductor device, for example trench IGBTs (Insulated Gate Bipolar Transistors), the same disadvantage of poor avalanche capability is also affecting the performance of the power semiconductor device.
Accordingly, it would be desirable to provide new and improved power semiconductor devices to avoid the constraint discussed above.